Associate Professor
Department of Computer and Communication Engineering School of Computing & Information Technology
Dr Amita Nandal is Associate Professor in the Department of Computer and Communication Engineering at School of Computing & Information Technology, MUJ.
SUBJECTS CURRENTLY TEACHING
| Subject | Subject code | Semester |
|---|---|---|
| Switching Theory & Logic Design | CS1302 | B.Tech 3rd Semester |
| Principles of Distributed Computing | CS1760 | B.Tech 7th Semester |
ACADEMIC QUALIFICATIONS
| Degree | Specialisation | Institute | Year of passing |
|---|---|---|---|
| Post-Doctorate | Signal and Image Processing | San Fransisco State University, San Fransisco, USA | 2017 |
| Post-Doctorate | Signal and Image Processing | Autonomous University of Zacatacas, Zacatacas, Mexico, South America | 2016 |
| PhD | Signal Processing for VLSI | SRM Institute of Science and Technology (Formerly SRM University), Kattankulathur, Tamil Nadu | 2014 |
| M.Tech | VLSI | SRM Institute of Science and Technology (Formerly SRM University), Kattankulathur, Tamil Nadu | 2009 |
| B.E | Electronics and Communication Engineering | Maharshi Dayanand University, Rohtak | 2007 |
Experience
| Institution / Organisation | Designation | Role | Tenure |
|---|---|---|---|
| University of Information Science and Technology, Ohrid, FyROM | Assistant Professor | Visiting Professor by research | 2016-2018 |
| San Fransisco State University, San Fransisco, USA | Post-Doctorate | Research | 2017 |
| Autonomous University of Zacatacas, Zacatacas, Mexico | Post-Doctorate | Research | 2016 |
| NIT Hamirpur (H.P) | Lecturer on Contract | Teaching | 2012-2016 |
| PDMCEW, Bahadurgarh | Assistant Professor | Teaching | July 2009- Jan. 2010 |
AREAS OF INTEREST, EXPERTISE AND RESEARCH
Area of Interest
Signal Processing, Signal Processing for VLSI, Wireless Communication
Area of Expertise
Image Processing, VLSI Design, Performance optimization for 5G network
Area of Research
Image enhancement- Fusion, Noise removal and higher order wavelets Quantum CAD and Xilinx-Vivado Matlab simulations related to Reconfigurable networks, CRN and modulation schemes
Work Experience
| Organisation | Role | Tenure |
|---|---|---|
| Tesco-HSC, Bangalore | Associate S/W Engineer | Jan. 2010-July2010 |
Worked as Project Associate for this project which is an Erasmus+ programme of the European Union
Worked in collaboration with Department of Electrical and Computer Engineering, San Francisco State University, San Francisco, USA.
Worked on a Project at National Laboratory in Embedded Systems, Advanced Electronic Design and Microsystems, University of Zacatecas, Government of Mexico
