Assistant Professor (Selection Grade) Department of Electronics & Communication Engineering
neha.singh@jaipur.manipal.edu
9928508993 Ext 349
PHD, MANIPAL UNIVERSITY JAIPUR, 2020
MTECH, MNIT, JAIPUR ,2009
BE ,UNIVERSITY OF RAJASTHAN ,2004
Image Processing
VLSI Design
Machine learning
Patent published (2021) B-ATM Transaction: Biometric Transaction Authorization based on user location Verification (202141036720).
Departmental NBA Co-ordinator
Lab in-charge of Electronic Circuit Design
Faculty coordinator for Student Club-Humans of Manipal Jaipur
Senior member IEEE
OPTICA member
"Kumawat P. K, Birla S, Singh N, ""Design and Optimization of a Heterojunction (Ge/Si) Vertical-Tunnel Field Effect Transistor (HV-TFET) with a Doped Bar for Low-Power Applications"" Journal of Electronic Materials
, 2024, 53(7), pp. 3933-3945"
Dua, T., Kumawat, R., Singh, N., Sharma, J., Srinivasulu, A., "High Speed Energy Efficient Latch Architectures for Sequential Circuit Design" Journal of VLSI Circuits and Systems, 2025, 7(1), pp. 56-65
Misra, A., Birla, S., Singh, N., Dargar, S.K, "High-Performance 10-Transistor Adder Cell for Low-Power Applications", IETE Journal of Research, 2023, 69(11), pp. 8318-8336
Birla, S., Singh, N., Shukla, N.K., Sharma, S., "A 9t finfet sram cell for ultra-low power application in the subthreshold regime", Bulletin of Electrical Engineering and Informatics, 2021, 10(6), pp. 3094-3101
Birla, S., Mahanti, S., Singh, N., "Leakage reduction technique for nano-scaled devices", Circuit World, 2021, 47(1), pp. 97-104