Teaching Faculties
Dr. Deepika Bansal
Assistant Professor (Selection Grade) Department of Electronics & Communication Engineering
- deepika.bansal@jaipur.manipal.edu
- +91 7742889057
- Ph.D., MANIPAL UNIVERSITY JAIPUR, 2020
- M.Tech., BANASTHALI UNIVERSITY, 2010
- B.Sc.+ M.Sc. (Electronics), Dr. B. R. Ambedkar University, Agra 2008
- VLSI Design
- Low power circuit design
- Digital Integrated Circuit Design
- Verilog
- Patent published (2023) Transistor sizing effect on noise margin enlargement of ternary logic (202311074734 A).
- Patent published (2023) Noise margin enlargement of efficient standard ternary inverter (202311071717 A).
- Departmental Ph.D. Co-ordinator
- Lab in-charge of Digital Electronics
- IEEE
- 1. Chauhan, K., & Bansal, D. (2024). Low power CNTFET-based ternary multiplier for digital signal processing applications. Engineering Research Express. https://doi.org/10.1088/2631-8695/ad2243
- Chauhan, K., Bansal, D. Power Efficient CNTFET-Based Ternary Comparators. J. Inst. Eng. India Ser. B (2023). https://doi.org/10.1007/s40031-023-00972-2
- Garg, Peeyush, Tanvi Joshi, and Deepika Bansal. "Design and development of RFID based smart shopping cart using Arduino." International Journal of Electronic Commerce Studies 13, no. 4 (2022): 015-038.
- Bansal D., Nagar B.C., Singh B. P., Kumar A., "A New Keeper Domino Logic Based Full Adder for High-Speed Arithmetic Circuits" Micro & Nanosystems, vol. 13, no. 2, 2021, pp. 223-232, ISSN No. 1876-4029. (Scopus indexed)
- Bansal D., Nagar B.C., Singh B. P., Kumar A., "Improved Domino Logic circuits and its Application in Wide fan-in OR Gates" Micro & Nanosystems, vol. 12, no. 1, Jan. 2020, pp. 58-67, ISSN No. 1876-4029. (Scopus indexed)
